About 7.62B parameters
Safetensors metadata reports 7,615,616,512 parameters, or about 7.62B.
Open Source Model Profile · chipcraftx-io
chipcraftx-rtlgen-7b
chipcraftx-rtlgen-7b is a 7.62B-parameter Qwen2 text-generation model from chipcraftx-io. Its model card describes it as a local RTL engine that turns natural-language specs into synthesizable Verilog, and captured metadata records a cc-by-nc-4.0 license.
- Publisher
- chipcraftx-io
- Task
- text-generation
- Model type
- qwen2
- License
- cc-by-nc-4.0
- Library
- transformers
- Publication status
- Approved for indexing
Model overview
chipcraftx-io publishes chipcraftx-rtlgen-7b as a transformers text-generation model. Captured config identifies Qwen2ForCausalLM with a qwen2 model type, and Safetensors metadata reports 7,615,616,512 parameters. Card data records cc-by-nc-4.0. Hub tags include verilog, rtl, hardware-design, eda, code-generation, and Qwen/Qwen2.5-Coder-7B-Instruct as base model and finetune.
Recorded capabilities
CC-BY-NC-4.0 licensing
Captured metadata records a cc-by-nc-4.0 license.
Publisher RTL role
The model card describes the checkpoint as the local RTL generation engine powering ChipCraftX, converting natural-language specifications into synthesizable Verilog.
Publisher VerilogEval figures
The model card reports a 36.5% standalone VerilogEval-Human functional pass rate for this 7B checkpoint, and 98.7% (154/156) for a ChipCraftX hybrid system that also uses Claude. Those figures are publisher-reported.
Use cases in the source record
- First-pass Verilog/RTL generation from natural-language hardware specifications, as described on the model card.
- Chip-design and EDA code-generation experiments tagged for verilog, rtl, and hardware-design.
Limitations and unknowns
- No independently verified evaluation results were extracted; VerilogEval-Human figures come from the publisher model card.
- Context-window, layer counts, and precision details in the technical summary come from the publisher model card rather than extracted config fields.
- Provider state is historical snapshot data, not independently refreshed current availability.
- QLoRA settings, dataset size, and Qwen2.5-Coder-7B-Instruct lineage come from the publisher model card and hub tags, not an independently verified Ethen lineage judgement.
Source and provenance
Source: chipcraftx-io/chipcraftx-rtlgen-7b
Captured: Unknown. Processed: 2026-09-07T19:35:55.027199+00:00.
chipcraftx-rtlgen-7b The local RTL generation engine powering ChipCraftX -- an AI platform that converts natural language specifications into synthesizable Verilog. chipcraftx-rtlgen-7b handles first-pass Verilog generation at zero API cost. Within the full ChipCraftX hybrid pipeline, the system achieves 98.7% functional pass rate on VerilogEval-Human (154/156) . Benchmark Results VerilogEval-Human (156 problems, functional simulation) Model Parameters Pass Rate VeriGen 16B 26.0% chipcraftx-rtlgen-7b (standalone) 7B 36.5% RTLCoder 7B 37.0% CodeV 7B 53.2% ChipCraftX hybrid system 7B + Claude 98.7% Model Details Base model : Qwen2.5-C…
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